1. Field of the Invention
The present invention relates to a layout pattern generating apparatus for generating a layout pattern to be used for writing ROM data in an LSI including a mask ROM.
2. Description of the Prior Art
Generally, for writing the logic "1" in manufacturing a ROM, a mask for exposure is first required to be manufactured which is necessary for the writing of the logic "1", and for manufacturing this mask, a layout pattern generating apparatus is required which calculates and outputs coordinate values for the manufacture of the mask on the basis of the truth value data. That is, as shown in FIG. 5, in the case of successively retrieving whether or not the logic "1" exists at the right side of truth value data f whose logic is "1", when a decision is made such that the truth value data whose logic is "1" exists at the right side of the truth value data of the logic "1", the starting point f1 to the lower right-end set point f2 are not read but all of 5 points including the lower left-end set point g1 of the data g, the upper left-end set point g4, the upper left-end set point f4 and the starting point f1 are read so as to set an area M to take in the gap N between the data f and the data g. Thereafter, the respective points g1, g2, g3, g4 and g1 of the next data g are read to set an area P. According to this operation, unlike the operation which independently reads a rectangular area corresponding to the data f, a rectangular area corresponding to the gap N and a rectangular area corresponding to the data g, the gap N can be read together with the data f, thus making easy the operation.
FIG. 20 is an input/output-related illustration for describing the conventional layout pattern generating apparatus in detail. In FIG. 20, numeral 201 designates a truth value data to be inputted to this apparatus, 206 represents a corrected layout pattern to be outputted from this apparatus and 207 denotes a ROM layout pattern correcting apparatus which acts as the layout pattern generating apparatus.
FIG. 21 is a functional block diagram showing the conventional layout pattern generating apparatus. In FIG. 21, numeral 202 designates a truth value data reading means for reading the truth value data 201, 213 represents a coordinate data calculating means for calculating coordinate data of the layout pattern corresponding to the truth value data 201, 214 denotes a layout pattern correcting means for correcting the layout pattern to produce the corrected layout pattern 206, and 215 depicts a coordinate data storing section for storing the coordinate data calculated in the coordinate data calculating means 213.
FIG. 22 shows one example of the truth data, and FIG. 23 illustrates one example of the layout pattern where the layout pattern coordinate is calculated only with respect to the truth value data whose logic is "1". Further, FIG. 24 shows one example of the corrected layout pattern after the correction of the layout pattern, and FIG. 25 is a flow chart showing the operation of the conventional layout pattern generating apparatus.
Secondly, the operation of the conventional apparatus will be described hereinbelow with reference to FIGS. 20 to 25. First, the truth value data are read by the truth value data reading means 202 (step N1). The truth value data means the ROM data converted into the binary number data, comprising the logic "1" and the logic "0", and rearranged to correspond to a memory cell array on the layout pattern. A rectangular coordinate data to be drawn on the mask ROM with respect to the logic "1" truth value data are calculated by the coordinate data calculating means 213 to produce the layout pattern (step N2). Then, the layout pattern correcting means 214 retrieves, with respect to the respective rectangles of the layout pattern, whether a rectangle adjacent to the upper, lower and right, left positions exists (step N3). If there is the rectangle adjacent thereto, the layout pattern correcting means 214 performs the correction of the layout pattern to produce the corrected layout pattern (step N4). There is no rectangle adjacent thereto, the correction of the layout pattern is not effected. Here, the correction of the layout pattern means that the rectangular coordinate data is recalculated so as to eliminate the gap between the adjoining rectangles (FIG. 24).
FIG. 26 is a functional block diagram showing the conventional layout pattern. In FIG. 26, numeral 1 represents truth value data to be inputted to this layout pattern generating apparatus, 4 designates coordinate value data, 12 denotes a corrected layout pattern data to be outputted from this apparatus, 124 depicts a reading means for reading the truth value data 1, 125 indicates a truth value data retrieving means for retrieving whether an adjoining rectangle exists around the rectangle (the truth value data ="1"), and 126 is a layout pattern producing means for performing the correction of the layout pattern to produce the layout pattern data.
FIG. 27 shows one example of the truth value data. FIG. 28 shows one example of the layout pattern after the layout pattern process. In FIG. 28, 15a represents a light-transmission pattern and 15b designates a light-cutting pattern. A printing is effected with respect to a device in accordance with these patterns.
FIGS. 29(a) and (b) flow charts showing the operation of the conventional layout pattern generating apparatus. In FIGS. 29(a) and (b), the truth value data is first read (step 127). The truth value data means the ROM data (hexadecimal number) which is inputted to the LSI with the mask ROM, the ROM data being converted into binary number data, comprising "1" and "0", and rearranged to correspond to the memory cell array on the layout pattern. Here, when the truth value data have ended, the process terminates (step 128). It is checked whether or not the read truth value data is the data for generating a rectangle (step 129). If the truth value data is the rectangle-generating data (truth value data ="1"), the coordinate value data calculating process is effected for performing the correction process of the layout pattern data. If it is the data (truth value data="0") which does not generate the rectangle, the operational flow returns to the truth value data reading process.
Further, it is effected to retrieve whether a rectangle (truth value data="1") adjacent to the upper, right and upper-right sides of the rectangle-generating data exists (step 130). If there is the rectangle adjacent to all of the upper, right-upper and right sides thereof, the correction process of the layout pattern is performed so as to fill up the gaps between the rectangles existing at the upper, right-upper and right sides thereof (step 131), thereby producing the corrected layout pattern. If there is no rectangle which is adjacent to at least one of the upper, right-upper and right sides thereof, the next retrieving process is effected. Here, the layout pattern correcting process means that the rectangular coordinate value data is calculated so as to fill up the gap between the adjacent rectangles (FIG. 28).
Moreover, it is effected to retrieve whether a rectangle adjacent to the right side of the data which generates a rectangle exists (step 132). If there is the rectangle adjacent to the right side thereof, the correction process of the layout pattern is effected so as to fill up the gap between the rectangles (step 133), thereby produce the corrected layout pattern 12. If such rectangles do not exist at the right side, the next retrieving process is effected. Further, it is checked whether or not a rectangle adjacent to the lower and lower-right sides of the data which generates a rectangle exists (step 134). If the rectangle adjacent to all of the lower and lower-right sides thereof exists, it is checked whether or not a rectangle adjacent to the upper side thereof exists (step 135). Here, if there is the rectangle adjacent to the upper side thereof exists, the correction process of the layout pattern is effected so as to fill up the gap between the upper and lower side rectangles (step 136). If the rectangle adjacent to the upper side thereof does not exist, the correction process of the layout pattern is effected so as to fill up the gap relative to the lower side rectangle (step 137), thereby to produce the corrected layout pattern. If the rectangle adjacent to at least one of the lower and lower-right sides thereof does not exist, the next retrieving process is effected.
Still further, it is checked whether or not a rectangle adjacent to the upper side of the data which generates a rectangle exists (step 138). If the rectangle adjacent to the upper side thereof exists, the correction process of the layout pattern is effected to fill up the gap relative to the upper side rectangle (step 139) so as to produce the corrected layout pattern. If the rectangle adjacent to the upper side thereof does not exist, the operation advances to the next process.
If a rectangle adjacent to the upper, right, upper-right, lower-right and lower sides thereof does not exists, the layout pattern is produced without performing the correction process of the layout pattern (step 140).
The above-described operation for retrieving the adjoining rectangles and for calculating the rectangular coordinate value data is repeatedly effected with respect to each truth value data up to the end of the truth value data,
Since the conventional layout pattern generating apparatus is arranged as being described above, even if taking in the gap N between the adjacent data f and g where the logic is "1", in terms of the layout pattern the coordinate data is produced one by one in correspondence with the truth value data whose logic is "1". That is, similarly, the process is required to be effected to produce the coordinate data with respect to the respective data f and g. In the case of the mask ROM LSI having an extremely large ROM capacity, if the coordinate data is produced one by one with respect to the truth value data whose logic is "1", there is a problem that the data amount of the layout pattern extremely becomes large to require a large disc capacity for the processing, that is, the disc capacity for the processing lacks, and the time necessary for the processing becomes long.